CY7C1041D-10ZSXI

CYPRESS SEMICONDUCTOR  CY7C1041D-10ZSXI  芯片, SRAM, 4Mb, 256KX16, 5V, SOJ44

The is a 4MB high-performance CMOS Static Random Access Memory SRAM organized as 256K words by 16-bit. Writing to the device is accomplished by taking chip enable and write enable inputs LOW. If byte low enable is LOW, then data from I/O pins, is written into the location specified on the address pins. If byte high enable is LOW, then data from I/O pins is written into the location specified on the address pins. Reading from the device is accomplished by taking chip enable and output enable LOW while forcing the write enable HIGH. If byte low enable is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If byte high enable is LOW, then data from memory will appear on I/O8 to I/O15. The input/output pins are placed in a high-impedance state when the device is deselected, the outputs are disabled, the BHE and BLE are disabled or during a write operation.

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Pin and function-compatible with CY7C1041B

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High speed - 10ns

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Low active power

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Low CMOS standby power

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2V Data retention

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Automatic power-down when deselected

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TTL-compatible inputs and outputs

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Easy memory expansion with CE and OE