MC74AC74DR2G

ON SEMICONDUCTOR  MC74AC74DR2G  触发器, 互补输出, 差分, 正沿, D, 9.5 ns, 160 MHz, 24 mA, SOIC, 14 引脚 新

Dual D−Type Positive Edge−Triggered Flip−Flop

  The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary Q,Q outputs. Information at the input is transferred to the outputs on the

positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Asynchronous Inputs:

LOW input to SDSet sets Q to HIGH level

LOW input to CDClear sets Q to LOW level

Clear and Set are independent of clock

Simultaneous LOW on CDand SDmakes both Q and QHIGH

Features

•Outputs Source/Sink 24 mA

•′ACT74 Has TTL Compatible Inputs

•Pb−Free Packages are Available