高性能、低相位噪声、低偏移的时钟同步器(使参考时钟与 VCXO 同步)
The is a high-performance, low phase noise and low skew clock synchronizer that synchronizes a VCXO voltage controlled crystal oscillator or VCO voltage controlled oscillator frequency to one of the two reference clocks. The programmable pre-divider M and the feedback-dividers N and P give a high flexibility to the frequency ratio of the reference clock to VCXO
VCXO_IN clock operates up to 2.2 GHz. Through the selection of external VCXO and loop filter components, the PLL loop bandwidth and damping factor can be adjust to meet different system requirements.
The CDCM7005 can lock to one of two reference clock inputs PRI_REF and SEC_REF, supports frequency hold-over mode and fast-frequency-locking for fail-safe and increased system redundancy. The outputs of the CDCM7005 are user definable and can be any combination of up to five LVPECL outputs or up to 10 LVCMOS outputs. The built in synchronization latches ensure that all outputs are synchronized for low output skew.
All device settings, like outputs signaling, divider value, and input selection are programmable by SPI 3-wire serial peripheral interface. SPI allows individually control of the device settings.
The device operates in 3.3-V environment and is characterized for operation from –40°C to 85°C.
Clock Synchronizer
Secondary Clock for Redundancy Support With
Manual or Automatic Selection
MHz
Two Reference Clocks
LVCMOS Up to Five Differential LVPECL Outputs
or up to 10 LVCMOS Outputs
/6, /8, /16 on Each Output Individually
Bandwidth
SEC_REF to Outputs
200 µA to 3 mA
Wide Tuning Voltage Range VCOs
Center-Frequency Setting of VCXO
Ended Input Signals VCXO_IN
Operation
State at VCC < 1.5 V
48-Pin QFN RGZ
型号 | 品牌 | 下载 |
---|---|---|
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