AD7612

14位， 1 MSPS ，差分可编程输入的PulSAR ADC 14-Bit, 1 MSPS, Differential, Programmable Input PulSAR ADC

Product Details

The is a 16-bit charge redistribution successive approximation register SAR, architecture analog-to-digital converter ADC fabricated on Analog Devices, Inc."s _i_CMOS high voltage process. The device is configured through hardware or via a dedicated write only serial configuration port for input range and operating mode. The AD7612 contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference and buffer, error correction circuits, and both serial and parallel system interface ports. A falling edge on CNVST samples the analog input on IN+ with respect to a ground sense, IN–. The AD7612 features four different analog input ranges and three different sampling modes: warp mode for the fastest throughput, normal mode for the fastest asynchronous throughput, and impulse mode where power consumption is scaled linearly with throughput. Operation is specified from −40°C to +85°C.

**Product Highlights**

1. Programmable input range and mode selection. Pins or serial port for selecting input range/mode select.

2. Fast throughput. In warp mode, the AD7612 is 750 kSPS.

3. Superior Linearity. No missing 16-bit code. ±1.5 LSB max INL.

4. Internal Reference. 5 V internal reference with a typical drift of ±3 ppm/°C and an on-chip temperature sensor.

5. Serial or Parallel Interface. Versatile parallel 16- or 8-bit bus or 2-wire serial interface arrangement compatible with 3.3 V or 5 V logic.

**Applications**

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Process control

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Medical instruments

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High speed data acquisition

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Digital signal processing

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Instrumentation

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Spectrum analysis

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ATE

### Features and Benefits

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Multiple pins/software programmable input ranges: 5 V, 10 V, ±5 V, ±10 V

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Pins or serial SPI®-compatible input ranges/mode selection

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Throughput

750 kSPS warp mode

600 kSPS normal mode

500 kSPS impulse mode

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INL: ±0.75 LSB typical, ±1.5 LSB maximum ±23 ppm of FSR

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16-bit resolution with no missing codes

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SNR: 92 minimum 5 V @ 2 kHz, 94 dB typical ±10 V @ 2 kHz

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THD: −107 dB typical

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_i_CMOS™ process technology

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5 V internal reference: typical drift 3 ppm/°C; TEMP output

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No pipeline delay SAR architecture

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Parallel 16- or 8-bit bus and serial 5 V/3.3 V interface

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SPI-/QSPI™-/MICROWIRE™-/DSP-compatible

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