TCA4311ADR

TEXAS INSTRUMENTS  TCA4311ADR  专用接口, I2C, 服务器, 路由器, 基站, 工业自动化, 2.7 V, 5.5 V, SOIC, 8 引脚

The is a hot-swappable I²C Bus Buffer that supports I/O card insertion into a live backplane without corruption of the data and clock busses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, this device provides bidirectional buffering, keeping the backplane and card capacitances isolated. During insertion, the SDA and SCL lines are pre-charged to 1V to minimize the current required to charge the parasitic capacitance of the chip. When the I²C bus is idle, the buffer can be put into shutdown mode by setting the EN pin low. When EN is high, the buffer resumes normal operation. It also includes an open drain READY output pin, which indicates that the backplane and card sides are connected together. The size of the pull-up resistors to the I/Os depends on the system, but each side of this buffer must have a pull-up resistor.

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Supports bidirectional data transfer of I²C bus signals

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SDA and SCL lines are buffered which increases fan-out

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SDA and SCL input lines are isolated from outputs

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Accommodates standard-mode and fast-mode I²C devices

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Improved noise immunity

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Applications include hot board insertion and bus extension

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Low ICC chip disable of <1µA

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READY open-drain output

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Supports clock stretching, arbitration and synchronization

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Powered-OFF high-impedance I²C-bus pins

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Open-drain I²C pins

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Latch-up performance exceeds 100mA per JESD 78, class II

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ESD Protection exceeds JESD 22

Device has limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.