TL16C752BPTG4

3.3 V双64字节FIFO的UART 3.3-V DUAL UART WITH 64-BYTE FIFO

description

The TL16C752B is a dual universal asynchronous receiver/transmitter UART with 64-byte FIFOs, automatic hardware/software flow control, and data rates up to 3.125 Mbps. The TL16C752B offers enhanced features. It has a transmission control register TCR that stores received FIFO threshold level to start/stop transmission during hardware and sofware flow control. With the FIFO RDY register, the software gets the status of TXRDY/RXRDY for all four ports in one access.

Pin Compatible With ST16C2550 With Additional Enhancements

Up to 1.5 Mbps Baud Rate When Using Crystal 24 MHz Input Clock

Up to 2.25 Mbps Baud Rate When Using Oscillator or Clock Source 36 MHz Input Clock

64-Byte Transmit FIFO

64-Byte Receive FIFO With Error Flags

Programmable and Selectable Transmit and

Receive FIFO Trigger Levels for DMA and Interrupt Generation

Programmable Receive FIFO Trigger Levels for Software/Hardware Flow Control

Software/Hardware Flow Control

– Programmable Xon/Xoff Characters

– Programmable Auto-RTSand Auto-CTS

Optional Data Flow Resume by Xon Any Character

DMA Signalling Capability for Both Received and Transmitted Data

Supports 3.3-V Operation

Software Selectable Baud Rate Generator

Prescaler Provides Additional Divide By 4 Function

Fast Access Time 2 Clock Cycle IOR/IOW Pulse Width

Programmable Sleep Mode

Programmable Serial Interface Characteristics

– 5, 6, 7, or 8 Bit Characters

– Even, Odd, or No Parity Bit Generation and Detection

– 1, 1.5, or 2 Stop Bit Generation

False Start Bit Detection

Complete Status Reporting Capabilities in Both Normal and Sleep Mode

Line Break Generation and Detection

Internal Test and Loopback Capabilities

Fully Prioritized Interrupt System Controls

Modem Control Functions CTS, RTS, DSR, DTR, RI, and CD