AD9265BCPZ-105

16位， 125 MSPS / 105 MSPS / 80 MSPS， 1.8 V模拟数字转换器 16-Bit, 125 MSPS/105 MSPS/80 MSPS 1.8 V Analog-to-Digital Converter

The is an Analog-to-digital Converter ADC designed to support communications applications where high performance combined with small size and versatility is desired. The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic to provide 16-bit accuracy at 125MSPS data rates and guarantees no missing codes over the full operating temperature range. The ADC features a wide bandwidth differential sample-and-hold analog input amplifier supporting a variety of user-selectable input ranges. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. A duty cycle stabilizer provides the means to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance over a wide range of input clock duty cycles.

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Integer 1-to-8 input clock divider

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Programmable internal ADC voltage reference

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Integrated ADC sample-and-hold inputs

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Differential analog inputs with 650MHz bandwidth

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ADC clock duty cycle stabilizer

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Serial port control

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User-configurable, built-in self-test capability

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Energy-saving power-down modes