IC PHASE LOCKED LOOP, PDSO16, PLL or Frequency Synthesis Circuit
GENERAL DESCRIPTION
The 74HC/HCT7046 are high-speed Si-gate CMOS devices and are specified in compliance with JEDEC standard no. 7.
FEATURES
• Low power consumption
• Centre frequency up to 17 MHz typ. at VCC= 4.5 V
• Choice of two phase comparators: EXCLUSIVE-OR; edge-triggered JK flip-flop;
• Excellent VCO frequency linearity
• VCO-inhibit control for ON/OFF keying and for low standby power consumption
• Minimal frequency drift
• Operation power supply voltage range:
VCO section 3.0 to 6.0 V
digital section 2.0 to 6.0 V
• Zero voltage offset due to op-amp buffering
• Output capability: standard
• ICC category: MSI