CD74HC299E

TEXAS INSTRUMENTS  CD74HC299E  移位寄存器, HC系列, 通用, 1元件, DIP, 20 引脚, 2 V, 6 V

The is a 8-bit CMOS universal Shift Register with 3-state outputs. The register has four synchronous-operating modes controlled by the two select inputs as shown in the mode select S0, S1 table. The mode select, the serial data DS0, DS7 and the parallel data I/O0 - I/O7 respond only to the low-to-high transition of the clock CP pulse. S0, S1 and data inputs must be one set-up time prior to the clock positive transition. The MR\ is an asynchronous active low input. When MR\ output is low, the register is cleared regardless of the status of all other inputs. The register can be expanded by cascading same units by tying the serial output Q0 to the serial data DS7 input of the preceding register and tying the serial output Q7 to the serial data DS0 input of the following register. Recirculating the n x 8 bits is accomplished by tying the Q7 of the last stage to the DS0 of the first stage.

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Buffered inputs

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Four operating modes - Shift left, shift right, load and store

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Can be cascaded for N-bit word lengths

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Balanced propagation delay and transition times

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Significant power reduction compared to LSTTL logic ICs

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High noise immunity

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Direct LSTTL input logic compatibility

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CMOS Input compatibility

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10 LSTTL Loads standard outputs

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15 LSTTL Loads bus driver outputs