SN74CBTD3384C

SN74CBTD3384C概述

具有电平转换和 -2V 下冲保护的 10 位 FET 总线开关

The is a high-speed TTL-compatible FET bus switch with low ON-state resistance, allowing for minimal propagation delay. This device features an integrated diode to VCC to provide level shifting for 5-V input down to 3.3-V output levels. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBTD3384C provides protection for undershoot down to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper state.

The SN74CBTD3384C is organized as two 5-bit bus switches with separate output-enable OE\ inputs. It can be used as two 5-bit bus switches or as one 10-bit bus switch. When OE\ is low, the associated 5-bit bus switch is ON, and port A is connected to port B. When OE\ is high, the associated 5-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
.
Integrated Diode to VCC Provides 5-V Input Down To 3.3-V Output Level Shift
.
Bidirectional Data Flow, With Near-Zero Propagation Delay
.
Low ON-State Resistance ron Characteristics ron = 3 Typical
.
Low Input/Output Capacitance Minimizes Loading and Signal Distortion CioOFF = 5 pF Typical
.
Data and Control Inputs Provide Undershoot Clamp Diodes
.
VCC Operating Range From 4.5 V to 5.5 V
.
Data I/Os Support 0 to 5-V Signaling Levels 0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V
.
Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
.
Ioff Supports Partial-Power-Down Mode Operation
.
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
.
ESD Performance Tested Per JESD 22
.
2000-V Human-Body Model A114-B, Class II
.
1000-V Charged-Device Model C101
.
Supports Both Digital and Analog Applications: Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating
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