74LVC244APW,118

74LVC244APW,118概述

八频缓冲器/线路驱动器三态

The is an octal non-inverting Buffer/Line Driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times. Inputs can be driven from either 3.3/5V devices. In 3-state operation, outputs can handle 5V. These features allow the use of this device as translators in a mixed 3.3 and 5V environment. The 74LVCH244A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.

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CMOS low-power consumption
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Direct interface with TTL levels
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Complies with JEDEC standard
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5V Tolerant inputs/outputs for interfacing with 5V logic
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High-impedance when VCC = 0V
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Inputs accept voltages up to 5.5V
74LVC244APW,118数据文档
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