S25FL127SABBHID00

S25FL127SABBHID00概述

SPANSION  S25FL127SABBHID00  闪存, 或非, 128 Mbit, 16M x 8位, 108 MHz, SPI, BGA, 24 引脚

128 Mbit 16 Mbyte MirrorBit® Flash Non-Volatile Memory CMOS 3.0 Volt Core

Serial Peripheral Interface with Multi-I/O

General Description

The S25FL127S device is a flash non-volatile memory product using:

■ MirrorBit technology - that stores two data bits in each memory array transistor

■ Eclipse architecture - that dramatically improves program and erase performance

■ 65 nm process lithography

This device connects to a host system via a Serial Peripheral Interface SPI. Traditional SPI single bit serial input and output SIngle I/O or SIO is supported as well as optional two bit Dual I/O or DIO and four bit Quad I/O or QIO serial commands. This multiple width interface is called SPI Multi-I/O or MIO.

Features

■ Density

   – 128 Mbits 16 Mbytes

■ Serial Peripheral Interface SPI

   – SPI Clock polarity and phase modes 0 and 3

   – Extended Addressing: 24- or 32-bit address options

   – Serial Command set and footprint compatible with S25FL-A, S25FL-K, and S25FL-P SPI families

   – Multi I/O Command set and footprint compatible with S25FL-P SPI family

■ READ Commands

   – Normal, Fast, Dual, Quad

   – AutoBoot - power up or reset and execute a Normal or Quad read command automatically at a preselected address

   – Common Flash Interface CFI data for configuration information.

■ Programming 0.8 Mbytes/s

   – 256- or 512-byte Page Programming buffer options

   – Quad-Input Page Programming QPP for slow clock systems

■ Erase 0.5 Mbytes/s

   – Hybrid sector size option - physical set of sixteen 4-kbyte sectors at

top or bottom of address space with all remaining sectors of

64 kbytes

   – Uniform sector option - always erase 256-kbyte blocks for software compatibility with higher density and  future devices.

■ Cycling Endurance

   – 100,000 Program-Erase Cycles per sector minimum

■ Data Retention

   – 20 Year Data Retention typical

■ Security features

   – One Time Program OTP array of 1024 bytes

   – Block Protection:

      – Status Register bits to control protection against program or erase of a contiguous range of sectors.

      – Hardware and software control options

   – Advanced Sector Protection ASP

      – Individual sector protection controlled by boot code or password

■ Spansion® 65 nm MirrorBit Technology with Eclipse™ Architecture

■ Supply Voltage: 2.7V to 3.6V

■ Temperature Range:

   – Industrial -40°C to +85°C

   – Automotive In-Cabin -40°C to +105°C

■ Packages all Pb-free

   – 8-lead SOIC 208 mil

   – 8-contact USON 6 x 5 mm

   – BGA-24 6 x 8 mm

   – 5 x 5 ball FAB024 and 4 x 6 ball FAC024 footprint options

   – Known Good Die and Known Tested Die

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