74LVT573MTC

FAIRCHILD SEMICONDUCTOR  74LVT573MTC  芯片, 74LVT CMOS逻辑器件

The is an Octal Transparent Latch with 3-state outputs. The latch appears transparent to the data when LE is high. When LE is low, the data satisfying the input timing requirements is latched. Data appears on the bus when the OE\ is low. When OE\ is high, the bus output is in the high impedance state. The LVTH573 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These octal latches are designed for low-voltage 3.3V VCC applications, but with the capability to provide a TTL interface to a 5V environment. It is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.

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Live insertion/extraction permitted

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Power up/down high impedance provides glitch-free bus loading

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Outputs source/sink -32mA/+64mA

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Functionally compatible with the 74 series 573

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Latch-up performance exceeds 500mA