SN74LVTH125PWRE4

3.3 -V ABT翻两番总线缓冲器，三态输出 3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS

description/ordering information

These bus buffers are designed specifically for low-voltage 3.3-V VCCoperation, but with the capability to

provide a TTL interface to a 5-V system environment.

The ’LVTH125 devices feature independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable OE input is high.

Support Mixed-Mode Signal Operation 5-V Input and Output Voltages With 3.3-V VCC

Support Unregulated Battery Operation Down to 2.7 V

Typical VOLPOutput Ground Bounce

<0.8 V at VCC= 3.3 V, TA= 25°C

Ioff and Power-Up 3-State Support Hot Insertion

Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors

Latch-Up Performance Exceeds 500 mA Per JESD 17

ESD Protection Exceeds JESD 22

  − 2000-V Human-Body Model A114-A

  − 200-V Machine Model A115-A