TC58DVM72A1FT00

128Mbit 16M x 8Bits/8M x 16Bits CMOS NAND E2PROM

DESCRIPTION

The TC58DxM72x1xxxx is a 128-Mbit 138,412,032 bit NAND Electrically Erasable and Programmable Read-Only Memory NAND E2 PROM organized as 528 bytes/264 words u32 pages u1024 blocks. The device uses dual power supplies 2.7 V to 3.6 V for VCCand 1.65 V to 1.95 V for VCCQ. The device has a 528-byte/264-words static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte/256-words increments. The Erase operation is implemented in a single block unit 16 Kbytes 512 bytes:

528 bytes u32 pages/8k words + 256 words:264 words x 32 pages. 

FEATURES

Organization            TC58DxM72A1xxxx          TC58DxM72F1xxxx

  Memory cell allay   528 x 32K x8                  264 x 32k x 16

  Register               528 x 8                          264 x 16

  Page size             528 bytes                       264 words

  Block size            16K 512 bytes                8k + 256 words

Modes

  Read, Reset, Auto Page Program

  Auto Block Erase, Status Read

Mode control

  Serial input/output

  Command control

Power supply             TC58DVM72x1xxxx         TC58DAM72x1xxxx

                               Vcc: 2.7V to 3.6V           2.7V to 3.6V

                               Vccq: 2.7V to 3.6V         1.65V to 1.95V

Program/Erase Cycles   1E5 cycle with ECC

Access time

  Cell array to register  25 Ps max

  Serial Read Cycle  50 ns min

Operating current

  Read 50 ns cycle  10 mA typ.

  Program avg.  10 mA typ.

  Erase avg.  10 mA typ.

  Standby 50 PA max.

Package

  TSOP I 48-P-1220-0.50 Weight:0.53g typ