FDG6320C

FAIRCHILD SEMICONDUCTOR  FDG6320C  双路场效应管, MOSFET, N和P沟道, 220 mA, 25 V, 4 ohm, 4.5 V, 850 mV

The is a dual N/P-channel logic level enhancement-mode MOSFET with high cell density and DMOS technology. This very high density process is especially tailored to minimize ON-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETs. Since bias resistors are not required, this dual digital FET can replace several different digital transistors, with different bias resistor values.

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Very small package outline

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Very low level gate drive requirements allowing direct operation in 3V circuits VGS th <1.5V

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Gate-source Zener for ESD ruggedness