74AUP1G07GW

74AUP1G/74AUP1T 系列，NXP### 74AUP 系列工业标准高级超低功耗 AUP 逻辑系列产品，用于超低功耗、体积小的逻辑解决方案，适用于 1.8 V 和混合 1.8 V / 3.3 V 电路应用。 AUP 逻辑系列提供以下特征：广泛的电压范围：0.8 至 3.6V 施密特触发器输入，用于高抗杂讯度 极低的动态功耗 增强型 ESD 保护 速度/功耗优化

The is a low-power single non-inverting Buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 to 3.6V. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 to 3.6V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

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High noise immunity

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OFF circuitry provides partial Power-down mode operation

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Complies with JEDEC standards

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Low static power consumption, ICC = 0.9µA maximum

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Latch-up performance exceeds 100mA per JESD 78 class II

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Inputs accept voltages up to 3.6V

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Low noise overshoot and undershoot <10% of VCC