AD5684BRUZ-RL7

DAC 4CH Resistor-String 12Bit 16Pin TSSOP T/R

Product Details

The AD5684, a member of the _nano_DAC+™ family, is a low power, quad, 12-bit buffered voltage output DAC. The device includes a gain select pin giving a full-scale output of 2.5 V gain = 1 or 5 V gain = 2. The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The device is available in a 3 mm × 3 mm LFCSP and a TSSOP package.

The AD5684 also incorporates a power-on reset circuit and a RSTSEL pin that ensures that the DAC outputs power up to zero scale or midscale and remain at that level until a valid write takes place. Each part contains a per-channel power-down feature that reduces the current consumption of the device to 4 μA at 3 V while in power-down mode.

The AD5684 employs a versatile SPI interface that operates at clock rates up to 50 MHz, and all devices contain a VLOGIC pin intended for 1.8 V/3 V/5 V logic.

**Product Highlights**

1. High Relative Accuracy INL: ±1 LSB maximum

2. Excellent DC Performance.

Total unadjusted error: ±0.1% of FSR maximum

Offset error: ±1.5 mV maximum

Gain error: ±0.1% of FSR maximum

3. Two Package Options: 3 mm × 3 mm, 16-lead LFCSP and 16-lead TSSOP

**Applications**

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Digital gain and offset adjustment

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Programmable attenuators

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Process control PLC I/O cards

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Industrial automation

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Data acquisition systems

### Features and Benefits

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High relative accuracy INL: ±1 LSB maximum @ 12 bits

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Tiny package: 3 mm × 3 mm, 16-lead LFCSP

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Total unadjusted error TUE: ±0.1% of FSR maximum

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Offset error: ±1.5 mV maximum

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Gain error: ±0.1% of FSR maximum

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High drive capability: 20 mA, 0.5 V from supply rails

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User selectable gain of 1 or 2 GAIN pin

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Reset to zero scale or midscale RSTSEL pin

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1.8 V logic compatibility

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50 MHz SPI with readback or daisy chain

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Low glitch: 0.5 nV-sec

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Low power: 1.8 mW at 3 V

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2.7 V to 5.5 V power supply

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−40°C to +105°C temperature range