3.3 -V 20位总线接口触发器具有三态输出 3.3-V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
This 20-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16821 can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20 flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock CLK input, the device provides true data at the Q outputs.
A buffered output-enable OE\ input can be used to place the ten outputs in either a normal logic state high or low logic levels or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
OE\ does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
型号 | 品牌 | 下载 |
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SN74ALVCH16821DGGR | TI 德州仪器 | 下载 |
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SN74CB3T3383DWR | TI 德州仪器 | 下载 |
SN74CBTLV3383PW | TI 德州仪器 | 下载 |
SN74CBT16212AZQLR | TI 德州仪器 | 下载 |
SN74CBT3383DBQR | TI 德州仪器 | 下载 |
SN74CB3T3383PW | TI 德州仪器 | 下载 |
SN74CBTLV3383PWE4 | TI 德州仪器 | 下载 |
SN74CBT3383DBR | TI 德州仪器 | 下载 |
SN74CB3T3383PWR | TI 德州仪器 | 下载 |