ADS54J60IRMP

ADS54J60IRMP概述

模数转换器 - ADC Dual-Channel, 16-Bit, 1.0-GSPS Analog-to-Digital Converter ADC 72-VQFN -40 to 85

The ADS54J60 is a low-power, wide-bandwidth, 16-bit, 1.0-GSPS, dual-channel, analog-to-digital converter ADC. Designed for high signal-to-noise ratio SNR, the device delivers a noise floor of –159 dBFS/Hz for applications aiming for highest dynamic range over a wide instantaneous bandwidth. The device supports the JESD204B serial interface with data rates up to 10 Gbps, supporting two or four lanes per ADC. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. Each ADC channel optionally can be connected to a wideband digital down-converter DDC block. The ADS54J60 provides excellent spurious-free dynamic range SFDR over a large input frequency range with very low power consumption.

The JESD204B interface reduces the number of interface lines, allowing high system integration density. An internal phase-locked loop PLL multiplies the ADC sampling clock to derive the bit clock that is used to serialize the 16-bit data from each channel.

ADS54J60IRMP数据文档
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