TMS664164

1 048 576 字 x 16 位 x 4 组同步动态随机存取存储器 PC100

The TMS664xx4 series are 67108864-bit synchronous dynamic random-access memory SDRAM devices which are organized as follow:

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Four banks of 1048576 words with 16 bits per word

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Four banks of 2097152 words with 8 bits per word

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Four banks of 4194304 words with 4 bits per word

All inputs and outputs of the TMS664xx4 series are compatible with the LVTTL interface.

The SDRAM employs state-of-the-art technology for high-performance, reliability, and low power. All inputs and outputs are synchronized with the CLK input to simplify system design and to enhance use with high-speed microprocessors and caches.

The TMS664xx4 SDRAM is available in a 400-mil, 54-pin surface-mount thin small-outline package TSOP DGE suffix.

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Organization...

1048576 x 16 Bits x 4 Banks

2097152 x 8 Bits x 4 Banks

4194304 x 4 Bits x 4 Banks

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3.3-V Power Supply ± 10% Tolerance

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Four Banks for On-Chip Interleaving for x8/x16 Gapless Access Depending on Organizations

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High Bandwidth - Up to 125-MHz Data Rates

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Burst Length Programmable to 1, 2, 4, 8

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Programmable Output Sequence - Serial or Interleave

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Chip-Select and Clock-Enable for Enhanced-System Interfacing

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Cycle-by-Cycle DQ Bus Mask Capability

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Only x16 SDRAM Configuration Supports Upper-/Lower-Byte Masking Control

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Programmable CAS Latency From Column Address

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Performance Ranges:

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Pipeline Architecture Single-Cycle Architecture

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Single Write/Read Burst

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Self-Refresh Capability Every 16 us

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Low-Noise, Low-Voltage Transistor-Transistor Logic LVTTL Interface

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Power-Down Mode

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Compatible With JEDEC Standards

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16K RAS-Only Refresh Total for All Banks

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4K Auto Refresh Total for All Banks/64 ms

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Automatic Precharge and Controlled Precharge

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Burst Interruptions Supported:

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Read Interruption

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Write Interruption

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Precharge Interruption

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Support Clock-Suspend Operation Hold Command

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Intel PC100 Compliant -8 and -8A parts