Latch Transparent 3-ST 8CH D-Type 20Pin TSSOP T/R
The 74LVC373A is a high performance, non-inverting octal transparent latch operating from a 1.2 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A V specification of 5.5 V allows 74LVC373A inputs to be safely driven from 5 V devices. The 74LVC373A contains 8 D-type latches with 3-state outputs. When the Latch Enable LE input is HIGH, data on the Dn inputs enters the latches. In this condition, the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW, the latches store the information that was present on the D inputs a setup time preceding the HIGH-to-LOW transition of LE. The 3-state standard outputs are controlled by the Output Enable OEbar input. When OEbar is LOW, the standard outputs are enabled. When OEbar is HIGH, the standard outputs are in the high impedance state, but this does not interfere with new data entering into the latches.
Features
---
|
型号 | 品牌 | 下载 |
---|---|---|
74LVC373ADTR2G | ON Semiconductor 安森美 | 下载 |
74LVC1GX04GW-Q100H | NXP 恩智浦 | 下载 |
74LVC1GX04GV-Q100H | NXP 恩智浦 | 下载 |
74LVC1GX04DCKRE4 | TI 德州仪器 | 下载 |
74LVC1G125GW | NXP 恩智浦 | 下载 |
74LVC245APW | NXP 恩智浦 | 下载 |
74LVC1GX04DBVTG4 | TI 德州仪器 | 下载 |
74LVC541APW,112 | NXP 恩智浦 | 下载 |
74LVCH244APW,118 | NXP 恩智浦 | 下载 |
74LVT126PW,112 | NXP 恩智浦 | 下载 |
74LVC14AD | Philips 飞利浦 | 下载 |