SN74LVC1G79

单路上升沿 D 类触发器

This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.

When data at the data D input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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Available in the Texas Instruments NanoFree Package

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Supports 5-V VCC Operation

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Inputs Accept Voltages to 5.5 V

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Supports Down Translation to VCC

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Max tpd of 4 ns at 3.3 V

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Low Power Consumption, 10-µA Max ICC

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±24-mA Output Drive at 3.3 V

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Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection

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Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

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ESD Protection Exceeds JESD 22

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2000-V Human-Body Model A114-A

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200-V Machine Model A115-A

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1000-V Charged-Device Model C101