TB5R1

四路 PECL 线路接收器

These quad differential receivers accept digital data overbalanced transmission lines. They translate differential input logic levels to TTL output logic levels.

The is a pin- and function-compatible replacement for the Agere systems BRF1A and BRF2A; it includes 3-kV HBM and 2-kV CDM ESD protection.

The TB5R2 is a pin- and function-compatible replacement for the Agere systems BRS2A and BRS2B and incorporates a 125-mV receiver input offset, preferred state output, 3-kV HBM and 2-kV CDM ESD protection. The TB5R2 preferred state feature places the high state when the inputs are open, shorted to ground, or shorted to the power supply.

The power-down loading characteristics of the receiver input circuit are approximately 8 k relative to the power supplies; hence they do not load the transmission line when the circuit is powered down.

The packaging for these differential line receivers include a 16-pin gull wing SOIC DW and SOIC D.

The enable inputs of this device include internal pullup resistors of approximately 40 k that are connected to VCC to ensure a logical high level input if the inputs are open circuited.

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Functional Replacements for the Agere BRF1A, BRF2A, BRS2A, and BRS2B

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Pin Equivalent to General Trade 26LS32

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High Input Impedance Approximately 8 k

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4-ns Maximum Propagation Delay

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TB5R1 Provides 50-mV Hysteresis

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TB5R2 With -125-mV Threshold Offset for Preferred State Output

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-1.1-V to 7.1-V Common Mode Range

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Single 5-V ±10% Supply

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Slew Rate Limited 1 ns min 80% to 20%

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TB5R2 Output Defaults to Logic 1 When Inputs Left Open or Shorted to VCC or GND

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ESD Protection HBM > 3 kV, CDM > 2 kV

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Operating Temperature Range: -40°C to 85°C

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Available in Gull-Wing SOIC JEDEC MS-013, DW and SOIC D Package

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APPLICA ONS

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Digital Data or Clock Transmission Over Balanced Lines