LTC4304CMS#PBF

LINEAR TECHNOLOGY  LTC4304CMS#PBF  芯片, 总线缓冲器, 热插拔, 2线式, 10MSOP

The is a 2-wire hot swappable Bus Buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. When a connection is made, it provides bidirectional buffering, keeping the backplane and card capacitances isolated. If SDAOUT or SCLOUT is low for >=30ms typical, the buffer automatically breaks the data and clock bus connection and FAULT will pull low. At this time the buffer automatically generates up to 16 clock pulses on SCLOUT in an attempt to free the bus. A connection will be enabled automatically when the bus becomes free. A logic low on the ACC input enables the LTC4304"s rise-time accelerators. A logic high on ACC disables the rise-time accelerators, which allows SDA and SCL bus pull-up voltages below VCC. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. When driven high, ENABLE allows the buffer to connect after a stop bit or bus idle occurs.

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Automatic disconnect of SDA/SCL lines when bus is stuck low for >= 30ms

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Recovers stuck busses with automatic clocking

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Bidirectional buffer for SDA and SCL lines increases fanout

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Prevents SDA and SCL corruption during live board insertion and removal from backplane

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Isolates input SDA and SCL lines from output

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READY open drain output

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ENABLE Gates connection from input to output

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±15kV Human body model ESD Protection

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Fault flag for stuck bus