ADS54J54IRGCT

四通道、14 位、500MSPS 模数转换器 ADC 64-VQFN -40 to 85

The ADS54J54 is a low power, wide bandwidth 14-bit 500 MSPS quad channel analog-to-digital converter ADC. It supports the JESD204B serial interface with data rates up to 5 Gbps supporting 1 or 2 lanes per ADC. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS54J54 provides excellent spurious-free dynamic range SFDR over a large input frequency range with very low power consumption. Optional 2x Decimation Filter provides high-pass or low-pass filter modes.