NXP 74HC4514D,653 芯片, 解码器/信号分离器, 4:16, SOIC-24
The is a 4-to-16 line Decoder or Demultiplexer with input latches is a high-speed Si-gate CMOS devices and are pin compatible with 4514 of the 4000B series. This is specified in compliance with JEDEC standard no-7A. This is 4-to-16 line decoders/demultiplexer having four binary weighted address inputs A0 to A3 with latches, a latch enable input LE and an active low enable input E. The 16 outputs Q0 to Q15 are mutually exclusive active high. When LE is high, the selected output is determined by the data on An. When LE goes low, the last data present at An are stored in the latches and the outputs remain stable. When E is low, the selected output, determined by the contents of the latch and is high. At E high all outputs are low. The enable input E does not affect the state of the latch.