时钟发生器, 抖动滤除器, 100MHz, 1.71V至1.89V, 2输出, QFN-36
* Provides jitter attenuation for any clock frequency * One clock input / two clock outputs * Input/output frequency range: 1–711 MHz * Ultra low jitter: 300 fs 12 kHz–20 MHz typical * Simple pin control interface * Selectable loop bandwidth for jitter attenuation: 60 Hz–8.4 kHz * Meets OC-192 GR-253-CORE jitter specifications * Selectable output clock signal format: LVPECL, LVDS, CML or CMOS * Single supply: 1.8, 2.5, or 3.3 V * Loss of lock and loss of signal alarms * VCO freeze during LOS/LOL * On-chip voltage regulator with high PSRR * Small size: 6 x 6 mm, 36-QFN * Wide temperature range: –40 to +85 ºC
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