STM8L151K4T6TR

STMICROELECTRONICS  STM8L151K4T6TR  微控制器, 8位, 超低功率, STM8L, 16 MHz, 16 KB, 2 KB, 32 引脚, LQFP

The medium-density STM8L151x4/6 and STM8L152x4/6 devices are members of the STM8L ultra-low-power 8-bit family. The medium-density STM8L15x family operates from 1.8 V to 3.6 V down to 1.65 V at power down and is available in the -40 to +85 °C and -40 to +125 °C temperature ranges.

The medium-density STM8L15x ultra-low-power family features the enhanced STM8 CPU core providing increased processing power up to 16 MIPS at 16 MHz while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations.

The family includes an integrated debug module with a hardware interface SWIM which allows non-intrusive In-Application debugging and ultra-fast Flash programming.

All medium-density STM8L15x microcontrollers feature embedded data EEPROM and low-power, low-voltage, single-supply program Flash memory.

They incorporate an extensive range of enhanced I/Os and peripherals.

The modular design of the peripheral set allows the same peripherals to be found in different ST microcontroller families including 32-bit families. This makes any transition to a different family very easy, and simplified even more by the use of a common set of development tools.

Six different packages are proposed from 28 to 48 pins. Depending on the device chosen, different sets of peripherals are included.

All STM8L ultra-low-power products are based on the same architecture with the same memory mapping and a coherent pinout.

**Key Features**

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Operating conditions

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Operating power supply range 1.8 V to 3.6 V down to 1.65 V at power down

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Temp. range: - 40 °C to 85, 105 or 125 °C

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Low power features

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5 low power modes: Wait, Low power run 5.1 μA, Low power wait 3 μA, Active-halt with full RTC 1.3 μA, Halt 350 nA

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Consumption: 195 μA/MHz + 440 μA

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Ultra-low leakage per I/0: 50 nA

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Fast wakeup from Halt: 4.7 μs

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Advanced STM8 core

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Harvard architecture and 3-stage pipeline

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Max freq. 16 MHz, 16 CISC MIPS peak

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Up to 40 external interrupt sources

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Reset and supply management

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Low power, ultra-safe BOR reset with 5 selectable thresholds

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Ultra-low-power POR/PDR

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Programmable voltage detector PVD

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Clock management

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1 to 16 MHz crystal oscillator

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32 kHz crystal oscillator

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Internal 16 MHz factory-trimmed RC

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Internal 38 kHz low consumption RC

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Clock security system

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Low power RTC

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BCD calendar with alarm interrupt

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Auto-wakeup from Halt w/ periodic interrupt

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LCD: up to 4x28 segments w/ step-up converter

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Memories

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Up to 32 KB of Flash program memory and 1 Kbyte of data EEPROM with ECC, RWW

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Flexible write and read protection modes

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Up to 2 Kbyte of RAM

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DMA

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4 channels; supported peripherals: ADC, DAC, SPI, I2C, USART, timers

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1 channel for memory-to-memory

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12-bit DAC with output buffer

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12-bit ADC up to 1 Msps/25 channels

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T. sensor and internal reference voltage

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2 ultra-low-power comparators

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1 with fixed threshold and 1 rail to rail

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Wakeup capability

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Timers

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Two 16-bit timers with 2 channels used as IC, OC, PWM, quadrature encoder

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One 16-bit advanced control timer with 3 channels, supporting motor control

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One 8-bit timer with 7-bit prescaler

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2 watchdogs: 1 Window, 1 Independent

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Beeper timer with 1, 2 or 4 kHz frequencies

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Communication interfaces

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Synchronous serial interface SPI

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Fast I2C 400 kHz SMBus and PMBus

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USART ISO 7816 interface and IrDA

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Up to 41 I/Os, all mappable on interrupt vectors

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Up to 16 capacitive sensing channels supporting touchkey, proximity, linear touch and rotary touch sensors

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Development support

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Fast on-chip programming and non intrusive debugging with SWIM

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Bootloader using USART

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96-bit unique ID