74LVC1G17GW,125

单施密特触发缓冲器

The is a single Schmitt trigger Buffer capable of transforming slowly changing input signals into sharply defined outputs. The input can be driven from either 3.3/5V devices. This feature allows the use of this device in a mixed 3.3 and 5V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

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High noise immunity

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CMOS low power consumption

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Direct interface with TTL levels

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Unlimited rise and fall times

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Complies with JEDEC standard

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Latch-up performance exceeds 250mA

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Inputs accept voltages up to 5V