SN74AUP1G125

具有三态输出的低功耗单路总线缓冲器门

This bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable OE input is high. This device has the input-disable feature, which allows floating input signals.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Available in the Texas Instruments NanoStar™

Package

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Low Static-Power Consumption

ICC = 0.9 µA Maximum

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Low Dynamic-Power Consumption

Cpd = 4 pF Typical at 3.3 V

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Low Input Capacitance CI = 1.5 pF Typical

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Low Noise — Overshoot and Undershoot

< 10% of VCC

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Input-Disable Feature Allows Floating Input

Conditions

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Ioff Supports Partial-Power-Down Mode Operation

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Input Hysteresis Allows Slow Input Transition and

Better Switching Noise Immunity at Input

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Wide Operating VCC Range of 0.8 V to 3.6 V

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3.6-V I/O Tolerant to Support Mixed-Mode Signal

Operation

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tpd = 4.6 ns Maximum at 3.3 V

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APPLICA ONS

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Audio Dock: Portable

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BluRay™ Players and Home Theaters

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Personal Digital Assistant PDA

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Power: Telecom/Server AC/DC Supply: Single

Controller: Analog and Digital

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Solid-State Drive SSD: Client and Enterprise

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TV: LCD/Digital and High-Definition HDTV

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Tablet: Enterprise

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Wireless Headsets, Keyboards, and Mice

NanoStar Is a trademark of Texas Instruments