具有锁存器的 8 位集电极开路驱动器
The device is an 8-bit open-collector driver with latch designed for 5-V VCC operation.
These circuits are positive-edge-triggered D-type flip-flops with a direct clear CLR input. Information at the data D input meeting the setup time requirements is transferred to the Y output on the positive-going edge of the clock CLK pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D-input has no effect at the output.
The TLC59212 is characterized for operation from 40°C to 85°C.
JEDEC Standard JESD-17