74LVTH125MTCX

缓冲器, 74LVT125, 2.7V至3.6V, TSSOP-14

The LVTH125 contains four independent non-inverting buffers with 3-STATE outputs. These buffers are designed for low-voltage 3.3V V applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH125 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.

Features

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Input and output interface capability to systems at 5V VCC

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Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs

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Live insertion/extraction permitted

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Power Up/Down high impedance provides glitch-free bus loading

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Outputs source/sink -32 mA/+64 mA

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Functionally compatible with the 74 series 125

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Latch-up performance exceeds 500 mA

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ESD performance:Human-body model > 2000VMachine model > 200VCharged-device model> 1000V