双LVTTL / LVCMOS到差分LVPECL翻译 Dual LVTTL/LVCMOS to Differential LVPECL Translator
Description
The is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The small outline 8−lead package and the single gate of the EPT22 makes it ideal for those applications where space, performance, and low power are at a premium. Because the mature MOSAIC 5 process is used, low cost and high speed can be added to the list of features.
Features
•420 ps Typical Propagation Delay
•Maximum Frequency > 1.1 GHz Typical
•Operating Range: VCC= 3.0 V to 3.6 V with GND = 0 V
•PNP LVTTL Inputs for Minimal Loading
•Q Output Will Default HIGH with Inputs Open
•The 100 Series Contains Temperature Compensation.
•Pb−Free Packages are Available