74ACT11074NSR

具有清零和预置端的双路正边沿触发式 D 型触发器 14-SO -40 to 85

This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset or clear input sets or resets the outputs regardless of the levels of the other inputs. When and are inactive high, data at the data D input meeting the setup-time requirements are transferred to the outputs on the low-to-high transition of the clock CLK pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs.

The 74ACT11074 is characterized for operation from -40°C to 85°C.