#include "FTM.h"
#include <stdio.h>
#include "device_registers.h" /* include peripheral declarations */
void PWM_GPIO_init(void)
{
/*PWM0--FTM0_CH1*/
PCC->PCCn[PCC_PORTD_INDEX ]|=PCC_PCCn_CGC_MASK; //使能PTD端口时钟
PORTD->PCR[16]|=PORT_PCR_MUX(2); // Port D16: MUX = ALT2 PTD16端口复用 FTM0_CH1
}
//FTM0初始化
void FTM0_init(void)
{
/** * FTM0 Clocking: * ================================================== */
PCC->PCCn[PCC_FTM0_INDEX] &= ~PCC_PCCn_CGC_MASK; /* Ensure clk disabled for config */
//使能FTM0时钟
PCC->PCCn[PCC_FTM0_INDEX] |= PCC_PCCn_PCS(1) /* Clock Src=1, 8 MHz SIRCDIV1_CLK */
| PCC_PCCn_CGC_MASK; /* Enable clock for FTM regs */
/*! * FTM0 Initialization: * =================================================== */
FTM0->MODE |= FTM_MODE_WPDIS_MASK; /* Write protect to registers disabled (default) */
FTM0->SC = FTM_SC_PWMEN0_MASK /* Enable PWM channel 0 output */
|FTM_SC_PWMEN1_MASK /* Enable PWM channel 1 output */
|FTM_SC_PS(3)
|FTM_SC_TOIE(1); /* TOIE (Timer Overflow Interrupt Ena) = 0 (default) */
/* CPWMS (Center aligned PWM Select) = 0 (default, up count) */
/* CLKS (Clock source) = 0 (default, no clock; FTM disabled) */
/* PS (Prescaler factor) = 7. Prescaler = 128 */
FTM0->COMBINE = 0x00000000; /* FTM mode settings used: DECAPENx, MCOMBINEx, COMBINEx=0 */
FTM0->POL = 0x00000000; /* Polarity for all channels is active high (default) */
FTM0->MOD = 100 -1 ; /* FTM1 counter final value (used for PWM mode) *///10ms
/* FTM1 Period = MOD-CNTIN+0x0001 ~= 62500 ctr clks */
/* 8MHz /128 = 62.5kHz -> ticks -> 1Hz */
S32_NVIC->ISER[(uint32_t)(FTM0_Ovf_Reload_IRQn) >> 5U] = (uint32_t)(1U << ((uint32_t)(FTM0_Ovf_Reload_IRQn) & (uint32_t)0x1FU));
S32_NVIC->ICPR[(uint32_t)(FTM0_Ovf_Reload_IRQn) >> 5U] = (uint32_t)(1U << ((uint32_t)(FTM0_Ovf_Reload_IRQn) & (uint32_t)0x1FU));
}
//关闭FTM0中断
void dis_FTM0IRQ()
{
S32_NVIC->ICER[(uint32_t)(FTM0_Ovf_Reload_IRQn) >> 5U] = (uint32_t)(1U << ((uint32_t)(FTM0_Ovf_Reload_IRQn) & (uint32_t)0x1FU));
FTM0->SC = FTM_SC_TOIE(1);
}
//FTM0通道 1 PWM初始化
void FTM0_CH1_PWM_init(int duty)
{
/** * FTM0, Channel 1 in PWM Mode: * ================================================== */
FTM0->CONTROLS[1].CnSC = FTM_CnSC_MSB_MASK
|FTM_CnSC_ELSB_MASK; /* FTM0 ch1: edge-aligned PWM, low true pulses */
/* CHIE (Chan Interrupt Ena) = 0 (default) */
/* MSB:MSA (chan Mode Select)=0b10, Edge Align PWM */
/* ELSB:ELSA (chan Edge/Level Select)=0b10, low true */
FTM0->CONTROLS[1].CnV = duty; /* 0~100 FTM0 ch1 compare value (0~100%:duty cycle) */
}
void start_FTM0_counter (void)
{
FTM0->SC |= FTM_SC_CLKS(1);
// FTM0->SC |= FTM_SC_CLKS(3);
/* Start FTM0 counter with clk source = external clock (SOSCDIV1_CLK)*/
}
#ifndef FTM_H_
#define FTM_H_
void PWM_GPIO_init(void);
void FTM0_init(void);
void FTM0_CH1_PWM_init(void);
void start_FTM0_counter (void);
#endif
main.c
#include <stdlib.h>
#include <limits.h>
#include <string.h>
#include "S32K116.h" /* include peripheral declarations S32K116 */
#include "clocks_and_modes_S32K11x.h"
#include "FTM.h"
void WDOG_disable (void)
{
WDOG->CNT=0xD928C520; /* Unlock watchdog */
WDOG->TOVAL=0x0000FFFF; /* Maximum timeout value */
WDOG->CS = 0x00002100; /* Disable watchdog */
}
int main(void)
{
/*! * Initialization: * ======================= */
WDOG_disable(); /* Disable WDOG */
SOSC_init_40MHz(); /* Initialize system oscillator for 40 MHz xtal */
RUN_mode_48MHz(); /* Init clocks: 48 MHz sys, core and bus, 24 MHz flash. */
PWM_GPIO_init(); //PWM GPIO 初始哈
FTM0_init(); //FTM0初始化
FTM0_CH1_PWM_init(70); //FTM0_CH1初始化
start_FTM0_counter(); //开启FTM0计数
while(1)
{
}
}