MC74HCT74A

双D触发器与设置，并与LSTTL兼容输入复位 Dual D Flip−Flop with Set and Reset with LSTTL Compatible Inputs

High-Performance Silicon-Gate CMOS The is identical in pinout to the LS74. This device may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. This device consists of two D flip-flops with individual Set, Reset, and Clock inputs. Information at a D-input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Q outputs are available from each flip-flop. The Set and Reset inputs are asynchronous.

Features

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Output Drive Capability: 10 LSTTL Loads

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TTL NMOS Compatible Input Levels

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Outputs Directly Interface to CMOS, NMOS, and TTL

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Operating Voltage Range: 4.5 to 5.5 V

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Low Input Current: 1.0 mA

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In Compliance with the Requirements Defined by JEDEC Standard No. 7A

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Chip Complexity: 136 FETs or 34 Equivalent Gates

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Pb-Free Packages are Available