CMOS 四路 2 输入与非施密特触发器
consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive- and negative-going signals. The difference between the positive voltage VP and the negative voltage VN is defined as hysteresis voltage VH see Fig. 2.
The CD4093B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix, 14-lead dual-in-line plastic packages E suffix, 14-lead small-outline packages M, MT, M96, and NSR suffixes, and 14-lead thin shrink small-outline packages PW and PWR suffixes.
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Schmitt-trigger action on each input with no external components
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Hysteresis voltage typically 0.9 V at VDD = 5 V and 2.3 V at VDD = 10 V
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Noise immunity greater than 50%
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No limit on input rise and fall times
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Standardized, symmetrical output characteristics
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100% tested for quiescent current at 20 V
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Maximum input current of 1 µA at 18 V over full package-temperature range, 100 nA at 18 V and 25°C
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5-V, 10-V, and 15-V parametric ratings
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Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices"
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Applications:
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Wave and pulse shapers
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High-noise-environment systems
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Monostable multivibrators
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Astable multivibrators
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NAND logic