AD9645BCPZRL7-125

双通道， 14位， 80 MSPS / 125 MSPS ，串行LVDS Dual, 14-Bit, 80 MSPS/125 MSPS, Serial LVDS

Product Details

The AD9645 is a dual, 14-bit, 80 MSPS/125 MSPS analog-to- digital converter ADC with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.

The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.

The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output DCO for capturing data on the output and a frame clock output FCO for signaling a new output byte are provided. Individual channel power-down is supported; the AD9645 typically consumes less than 2 mW in the full power-down state. The ADC provides several features designed to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface SPI.

The AD9645 is available in a RoHS-compliant, 32-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.

**PRODUCT HIGHLIGHTS**

1. Small Footprint. Two ADCs are contained in a small, spacesaving package.

2. Low Power. The AD9645 uses 122 mW/channel at 125 MSPS with scalable power options.

3. Pin Compatibility with the AD9635, a 12-Bit Dual ADC.

4. Ease of Use. A data clock output DCO operates at frequencies of up to 500 MHz and supports double data rate DDR operation.

5. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements.

**APPLICATIONS**

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Communications

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Diversity radio systems

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Multimode digital receivers

GSM, EDGE, W-CDMA, LTE,

CDMA2000, WiMAX, TD-SCDMA

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I/Q demodulation systems

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Smart antenna systems

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Broadband data applications

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Battery-powered instruments

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Hand held scope meters

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Portable medical imaging and ultrasound

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Radar/LIDAR

### Features and Benefits

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1.8 V supply operation

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Low power: 122 mW per channel at 125 MSPS with scalable power options

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SNR = 74 dBFS to Nyquist

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SFDR = 91 dBc at 70MHz

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DNL = ±0.65 LSB typical; INL = ±1.5 LSB typical

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Serial LVDS ANSI-644, default and low power, reduced signal option similar to IEEE 1596.3

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650 MHz full power analog bandwidth

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2 V p-p input voltage range

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See data sheet for additional features