SN74HC377

具有时钟使能输入的八路 D 类触发器

These devices are positive-edge-triggered octal D-type flip-flops with an enable input. The ’HC377 devices are similar to the ’HC273 devices, but feature a latched clock-enable CLKEN\ input instead of a common clear.

Information at the data D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock CLK pulse, if CLKEN\ is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. These devices are designed to prevent false clocking by transitions at CLKEN\\.

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Wide Operating Voltage Range of 2 V to 6 V

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Outputs Can Drive Up To 10 LSTTL Loads

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Low Power Consumption, 80-µA Max ICC

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Typical tpd = 12 ns

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±4-mA Output Drive at 5 V

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Low Input Current of 1 µA Max

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Eight Flip-Flops With Single-Rail Outputs

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Clock Enable Latched to Avoid False Clocking

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Applications Include:

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Buffer/Storage Registers

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Shift Registers

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Pattern Generators