74系列逻辑芯片/HD74LS245P
This octal bus transceiver is designed for synchronous two-way communication between data buses. The control function implementation minimizes external timing requirements. The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the direction control DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated.
立创商城:
HD74LS245P
Win Source:
Octal Bus Transceivers with three-state outputs
| 型号 | 品牌 | 下载 |
|---|---|---|
| HD74LS245P | Renesas Electronics 瑞萨电子 | 下载 |
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| HD74LS123RPEL | Renesas Electronics 瑞萨电子 | 下载 |
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