P3P623S00BG-08TR

Zero Delay PLL Clock Buffer Single 8Pin TSSOP T/R

P3P623S00B/E is a versatile, 3.3V zero-dealy buffer designed to distribute Timing-Safe™ clocks with peak EMI reduction.P3P623S00B is an eight pin version, accepts one reference input and drives out one low skew Timing-Safe™ clock.P3P623S00E accepts one reference input and drives out eight low-skew Timing-Safe™clocks.P3P623S0B/E has an SS% that selects two different deviation and associated Input-Output skewTskew.P3P623S00E has a CLKOUT for adjusting the Input-Output clock dealy, depending upon the value of capacitor connected at this pin to GND.P3P623S00B/E operates from a 3.3V supply and is available in two different packages, as shown in the ordering information table.

Features

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Clock distribution with Timing-Safe Peak EMI Reduction

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2 different Spread Selection options

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Spread Spectrum can be turned ON/OFF