X25642

EEPROMs-串行存储器 X25642 soic8 marking/标记 X25642

存储器格式Format - Memory| EEPROMs - 串行 EEPROMs - Serial \---|--- 存储器类型Memory Type| EEPROM 存储容量Memory Size| 128（16 x 8） 速度Speed| 100kHz，400kHz 接口Interface| I²C，2 线串口 I²C, 2-Wire Serial 电源电压Voltage - Supply| 2.5 V ~ 5.5 V Description & Applications| Advanced SPI Serial E2 PROM with Block LockTM Protection DESCRIPTION The is a CMOS 65,536-bit serial E2PROM, internally organized as 8K x 8. The X25642 features a Serial Peripheral Interface SPI and software protocol allowing operation on a simple three-wire bus. The bus signals are a clock input SCK plus separate data in SI and data out SO lines. Access to the device is controlled through a chip select CS input, allowing any number of devices to share the same bus. The X25642 also features two additional inputs that provide the end user with added flexibility. Byasserting the HOLD input, the X25642 will ignore transitions on its inputs, thus allowing the host to service higher priority interrupts. The WP input can be used as a hardwire input to the X25642 disabling all write attempts to the status register, thus providing a mechanism for limiting end user capability of altering 0, 1/4, 1/2 or all of the memory. The X25642 utilizes ’s proprietary Direct WriteTM cell, providing a minimum endurance of 100,000 cycles and a minimum data retention of 100 years. FEATURES • 2MHz Clock Rate • Low Power CMOS —<1µA Standby Current —<5mA Active Current • 2.7V To 5.5V Power Supply • SPI Modes 0,0 & 1,1 • 8K X 8 Bits —32 Byte Page Mode • Block Lock Protection —Protect 1/4, 1/2 or all of E PROM Array • Built-in Inadvertent Write Protection —Power-Up/Down protection circuitry —Write Enable Latch —Write Protect Pin • Self-Timed Write Cycle —5ms Write Cycle Time Typical • High Reliability —Endurance: 100,000 cycles —Data Retention: 100 Years —ESD protection: 2000V on all pins • Packages —8-Lead PDIP —8-Lead SOIC —14-Lead SOIC —20-Lead TSSOP 描述与应用| 先进的SPI串行E2 PROM座LockTM保护 说明 X25642是一个CMOS65,536位的串行E2PROM， 内部组织为8K×8。 X25642功能 串行外设接口（SPI）和软件协议 允许一个简单的三线总线上的操作。总线 信号是一个时钟输入（SCK）附加在单独的数据 （SI）和数据输出（SO）线。访问的移动设备是 通过控制一个片选（CS）输入，允许 任意数量的设备共享同一总线。 X25642还设有两个附加的输入， 为最终用户提供具有更多的灵活性。由 断言HOLD输入，X25642将忽略其输入的转换，从而使主机服务 高优先级中断。该WP输入可以用作 硬线输入到X25642禁用所有写 尝试到状态寄存器，从而提供了一种机制，用于限制最终用户的能力改变0，1/4，1/2或全部存储器。 X25642采用Xicor公司专有的直接WriteTM 细胞，提供最低耐力100,000 周期和数据至少保存100年 •2MHz时钟速率 •低功耗CMOS - <1μA待机电流 - <5毫安有功电流 •2.7V至5.5V电源 •SPI模式（0,0和1,1） •8K×8位 -32字节模式 •块锁定保护 保护1/4，1/2或全部的E PROM阵列 •内置无意中写保护 -Power-Up/Down保护电路 - 写使能锁存 写保护引脚 •自定时写周期 5ms的写入周期时间（典型值） •高可靠性 耐力：100,000周期 数据保存：100年 ESD保护：2000V所有引脚上 •软件包 8引脚PDIP 8引脚SOIC 14引脚SOIC - 20引脚TSSOP封装