TMS320F28052MPNT

具有 60MHz 频率、64KB 闪存、InstaSPIN-MOTION、PGA 的 C2000™ 32 位 MCU 80-LQFP -40 to 105

Description

The F2805x Piccolo™ family of microcontrollers provides the power of the C28x™ core and Control Law

Accelerator CLA coupled with highly integrated control peripherals in low pin-count devices. This family

is code-compatible with previous C28x-based code, as well as providing a high level of analog integration.

TMS320F2805x Piccolo™ MCUs

Features

• Highlights

– High-Efficiency 32-Bit CPU TMS320C28x™

– 60-MHz Device

– Single 3.3-V Supply

– Integrated Power-on and Brown-out Resets

– Two Internal Zero-pin Oscillators

– Up to 42 Multiplexed GPIO Pins

– Three 32-Bit CPU Timers

– On-Chip Flash, SARAM, Message RAM, OTP, CLA Data ROM, Boot ROM, Secure ROM Memory

– Dual-Zone Security Module

– Serial Port Peripherals SCI/SPI/I2C/eCAN

– Enhanced Control Peripherals

• Enhanced Pulse Width Modulator ePWM

• Enhanced Capture eCAP

• Enhanced Quadrature Encoder Pulse eQEP

– Analog Peripherals

• One 12-Bit Analog-to-Digital Converter ADC

• One On-Chip Temperature Sensor

• Up to Seven Comparators With up to Three Integrated Digital-to-Analog Converters DACs

• One Buffered Reference DAC

• Up to Four Programmable Gain Amplifiers PGAs

• Up to Four Digital Filters

– 80-Pin Package

• High-Efficiency 32-Bit CPU TMS320C28x™

– 60 MHz 16.67-ns Cycle Time

– 16 x 16 and 32 x 32 MAC Operations

– 16 x 16 Dual MAC

– Harvard Bus Architecture

– Atomic Operations

– Fast Interrupt Response and Processing

– Unified Memory Programming Model

– Code-Efficient in C/C++ and Assembly

• Endianness: Little Endian

• Programmable Control Law Accelerator CLA

– 32-Bit Floating-Point Math Accelerator

– Executes Code Independently of the Main CPU

• Low Device and System Cost:

– Single 3.3-V Supply

– No Power Sequencing Requirement

– Integrated Power-on Reset and Brown-out Reset

– Low Power

– No Analog Support Pins

• Clocking:

– Two Internal Zero-pin Oscillators

– On-Chip Crystal Oscillator/External Clock Input

– Dynamic PLL Ratio Changes Supported

– Watchdog Timer Module

– Missing Clock Detection Circuitry

• Up to 42 Individually Programmable, Multiplexed GPIO Pins With Input Filtering

• Peripheral Interrupt Expansion PIE Block That Supports All Peripheral Interrupts

• Three 32-Bit CPU Timers

• Independent 16-Bit Timer in Each ePWM Module

• On-Chip Memory

– Flash, SARAM, Message RAM, OTP, CLA Data ROM, Boot ROM, Secure ROM Available

• 128-Bit Security Key and Lock

– Protects Secure Memory Blocks

– Prevents Firmware Reverse Engineering

• Serial Port Peripherals

– Three SCI UART Modules

– One SPI Module

– One Inter-Integrated-Circuit I2C Bus

– One Enhanced Controller Area Network eCAN Bus

• Advanced Emulation Features

– Analysis and Breakpoint Functions

– Real-Time Debug via Hardware

• 80-Pin PN Low-Profile Quad Flatpack LQFP