SRAM Chip Sync Quad 2.5V/3.3V 18M-Bit 512K x 36 7.5ns/3.8ns 119Pin F-BGA Tray
* FT pin for user-configurable flow through or pipeline operation * Single/Dual Cycle Deselect selectable * IEEE 1149.1 JTAG-compatible Boundary Scan * ZQ mode pin for user-selectable high/low output drive * 2.5 V or 3.3 V +10%/–10% core power supply * LBO pin for Linear or Interleaved Burst mode * Internal input resistors on mode pins allow floating mode pins * Default to SCD x36 Interleaved Pipeline mode * Byte Write BW and/or Global Write GW operation * Internal self-timed write cycle * Automatic power-down for portable applications * JEDEC-standard 119-, 165-, and 209-bump BGA package * 1MB product Family * Green 14 mm x 22 mm, 119 BGA
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