ADL5391ACPZ

ANALOG DEVICES  ADL5391ACPZ  芯片, 乘法器, 2.0GHZ, 16LFCSP

The is a DC to 2.0GHz Multiplier provides the same general mathematical function that has been field proven to provide an exceptional degree of versatility in function synthesis. The most significant advance is the use of a new multiplier core architecture, which differs markedly from the conventional form that has been in use since 1970. The conventional structure that employs a current mode, translinear core is fundamentally asymmetric with respect to the X and Y inputs, leading to relative amplitude and timing misalignments that are problematic at high frequencies. The new multiplier core eliminates these misalignments by offering symmetric signal paths for both X and Y inputs. The Z input allows a signal to be added directly to the output. This can be used to cancel a carrier or to apply a static offset voltage. The fully differential X, Y and Z input interfaces are operational over a ±2V range and they can be used in single-ended fashion.

.

Ultrafast symmetric multiplier

.

Unique design ensures absolute XY-symmetry

.

Adjustable gain scaling, α

.

DC-coupled throughout, 3dB bandwidth of 2GHz

.

Fully differential inputs, may be used single ended

.

Low noise, high linearity

.

Low current power-down mode

ESD sensitive device, take proper precaution while handling the device.