SN74LVC2G08

双路 2 输入正与门

This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.

The device performs the Boolean function A &times B or Y = A\ + B\ in positive logic.

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

For all available packages, see the orderable addendum at the end of the data sheet.

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Available in the Texas Instruments

NanoStar™ and NanoFree™ Package

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Supports 5-V VCC Operation

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Inputs Accept Voltages to 5.5 V

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Max tpd of 4.7 ns at 3.3 V

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Low Power Consumption, 10-µA Maximum ICC

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±24-mA Output Drive at 3.3 V

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Typical VOLP Output Ground Bounce

<0.8 V at VCC = 3.3 V, TA = 25°C

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Typical VOHV Output VOH Undershoot

>2 V at VCC = 3.3 V, TA = 25°C

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Ioff Supports Live Insertion, Partial-Power-Down

Mode, and Back-Drive Protection

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Can Be Used as a Down Translator to Translate

Inputs From a Maximum of 5.5 V Down to the VCC

Level

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Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

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ESD Protection Exceeds JESD 22

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2000-V Human Body Model A114-A

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1000-V Charged-Device Model C101