PHY 1CH 3.3V/5V 100Pin TQFP
Description
The CS8952 uses CMOS technology to deliver a high performance, low-cost 100BASE-X/10BASE-T Physical Layer PHY line interface. It makes use of an adaptive equalizer optimized for noise and near end crosstalk NEXT immunity to extend receiver operation to cable lengths exceeding 160 m. In addition, the transmit circuitry has been designed to provide extremely low transmit jitter <400 ps for improved link partner performance. Transmit driver common mode noise has been minimized to reduce EMI for simplified FCC certification.
| 型号 | 品牌 | 下载 |
|---|---|---|
| CS8952-CQZ | Cirrus Logic 思睿逻辑 | 下载 |
| CS8900A-IQ3Z | Cirrus Logic 思睿逻辑 | 下载 |
| CS8900A-CQ3Z | Cirrus Logic 思睿逻辑 | 下载 |
| CS8900A-IQ3ZR | Cirrus Logic 思睿逻辑 | 下载 |
| CS8900A-CQZ | Cirrus Logic 思睿逻辑 | 下载 |
| CS8900A-IQZR | Cirrus Logic 思睿逻辑 | 下载 |
| CS8900A-CQ3ZR | Cirrus Logic 思睿逻辑 | 下载 |
| CS8952-IQZ | Cirrus Logic 思睿逻辑 | 下载 |
| CS8952-CQZR | Cirrus Logic 思睿逻辑 | 下载 |
| CS8952-IQZR | Cirrus Logic 思睿逻辑 | 下载 |
| CS8952-CQ | Cirrus Logic 思睿逻辑 | 下载 |