CD4020B

CMOS 14 级纹波进位二进制计数器/除法器

, CD4024B, and CD4040B are ripple-carry binary counters. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times. All inputs and outputs are buffered.

The CD4020B and CD4040B types are supplied in 16-lead hermetic dual-in-line ceramic packages F3A suffix, 16-lead dual-in-line plastic packages E suffix, 16-lead small-outline packages NSR suffix, and 16-lead thin shrink small-outline packages PW and PWR suffixes. The CD4040B type also is supplied in 16-lead small-outline packages M and M96 suffixes.

The CD4024B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix, 14-lead dual-in-line plastic packages E suffix, 14-lead small-outline packages M, MT, M96, and NSR suffixes, and 14-lead thin shrink small-outline packages PW and PWR suffixes.

.

Medium-speed operation

.

Fully static operation

.

Buffered inputs and outputs

.

100% tested for quiescent current at 20 V

.

Standardized, symmetrical output characteristics

.

Fully static operation

.

Common reset

.

5-V, 10-V, and 15-V parametric ratings

.

Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C

.

Noise margin over full package-temperature range:

     1 V at VDD = 5 V

     2 V at VDD = 10 V

     2.5 V at VDD = 15 V

.

Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices"

.

Applications:

.

Control counters

.

Timers

.

Frequency dividers

.

Time-delay circuits

CD4020B - 14 Stage

CD4024B - 7 Stage

CD4040B - 12 Stage