MC912DG128ACPV

IC MCU 16Bit 128KB FLASH 112LQFP

The MC68HC912DT128A microcontroller unit MCU is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit CPU12, 128K bytes of flash EEPROM, 8K bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces SCI, a serial peripheral interface SPI, an inter-IC interface I2C, an enhanced capture timer ECT, two 8-channel, 10-bit analog to-digital converters ADC, a four-channel pulse-width modulator PWM, and three CAN 2.0 A, B software compatible modules MSCAN12. System resource mapping, clock generation, interrupt control and bus interfacing are managed by the lite integration module LIM. The MC68HC912DT128A has full 16-bit data paths throughout, however, the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems.

Features

• 16-bit CPU12

– Upward compatible with M68HC11 instruction set

– Interrupt stacking and programmer’s model identical to M68HC11

– 20-bit ALU

– Instruction queue

– Enhanced indexed addressing

• Multiplexed bus

– Single chip or expanded

– 16 address/16 data wide or 16 address/8 data narrow modes

• Memory

– 128K byte flash EEPROM, made of four 32K byte modules with 8K bytes protected BOOT section in each module

– 2K byte EEPROM

– 8K byte RAM with Vstby, made of two 4K byte modules.

• Two Analog-to-digital converters

– 2 times 8-channels, 10-bit resolution

• Three 1M bit per second, CAN 2.0 A, B software compatible modules on the MC68HC912DT128A two on theMC68HC912DG128A

– Two receive and three transmit buffers per CAN

– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit

– Four separate interrupt channels for Rx, Tx, error and wake-upper CAN

– Low-pass filter wake-up function

– Loop-back for self test operation

– Programmable link to a timer input capture channel, for time

stamping and network synchronization.

• Enhanced capture timer ECT

– 16-bit main counter with 7-bit prescaler

– 8 programmable input capture or output compare channels; 4 of the 8 input captures with buffer

– Input capture filters and buffers, three successive captures on four channels, or two captures on four channels with a capture/compare selectable on the remaining four

– Four 8-bit or two 16-bit pulse accumulators

– 16-bit modulus down-counter with 4-bit prescaler

– Four user-selectable delay counters for signal filtering